Samsung Electronics introduced its new artificial intelligence memory technologies, including zHBM, zNAND-O, and 400-layer V10 BV-NAND, at the FMS 2026 event in the United States.
The company outlined a roadmap targeting future AI infrastructure with memory solutions built for hardware accelerators and on-device applications.
3D Memory Stacking for AI Accelerators
The most prominent announcement was the first public demonstration of the zHBM concept, a 3D High Bandwidth Memory architecture. Unlike traditional HBM designs where memory chips sit beside the AI processor, zHBM vertically stacks memory directly on top of the AI accelerator.
This design significantly shortens the data path between processor and memory. Samsung stated that the new interface system will deliver up to eight times higher performance compared to HBM5.
Samsung said wafer bonding technology allows memory density to increase by more than 10 times compared to HBM5, while energy efficiency triples and thermal resistance drops by more than half. The zHBM architecture is also customizable, allowing clients to add custom IP blocks between the memory and accelerator layers to boost memory capacity or enhance specific accelerator functions.
On-Device and High-Layer NAND Solutions
Samsung also revealed zNAND-O, a solution built on V-NAND technology using Through-Silicon Via (TSV) technology to vertically stack four or eight NAND chips. The letter O indicates a focus on on-device AI applications, aiming to deliver higher storage capacity and bandwidth in a compact area while reducing latency for Edge AI and real-time big data processing.
In addition, Samsung showcased V10 BV-NAND, its 10th-generation V-NAND featuring more than 400 layers. The Bonding Vertical architecture produces data cell layers and control circuits separately before combining them vertically.
The design pairs wafer bonding with a three-stack method, where cells are manufactured in three distinct sections before assembly. Samsung explained that this increases storage density by about 58 percent compared to the V9 generation, while boosting read, write, and I/O performance and easing chip thickness management.
Expanded Product Line and Market Demand
Samsung displayed several other AI memory products at the event, including HBM4E, HBM5, LPDDR5X-PIM, PM1763, and BM1773 for AI data centers and high-performance computing systems.
Samsung started producing HBM4 in February using 1c-class DRAM and a 4-nanometer base chip, and began shipping HBM4E samples to customers in May. The HBM5 model shown at the event features a new Heat Path Block thermal management technology.
The announcements come amid rising storage demands driven by large language model training and real-time inference. Samsung stated last week that long-term customer agreements could account for 60 to 70 percent of future memory sales. Analysts noted that DRAM and NAND supply chain inventories remain below historical averages, supported by strong AI demand despite questions regarding smartphone market demand.
