Intel has unveiled physical samples of its next-generation Diamond Rapids server processors at the Tencent Global Digital Ecosystem Conference in China.
The new processors, which will form part of the upcoming Xeon 7 family, are scheduled to reach the market in 2027 and will feature up to 1.28 gigabytes of last-level cache alongside 256 performance cores.
Intel Corporation, based in Santa Clara, California, produces the Xeon family for enterprise data centres and cloud infrastructure providers. The company is re-engineering its flagship server portfolio to address the rapidly growing computing requirements of agentic artificial intelligence, where autonomous software agents demand high computational capacity and rapid data processing across vast volumes of live data.
Architecture and memory specifications
The Diamond Rapids silicon will feature up to 256 Panther Cove-X performance cores operating without simultaneous multithreading, or SMT, support. Omitting multithreading allows chip designers to dedicate silicon area entirely to physical cores while reducing thread contention in cloud environments. Intel has also built in Advanced Matrix Extensions, known as AMX, and AVX 10.2 vector instructions to speed up artificial intelligence calculations.
A central feature of the platform is its memory subsystem, highlighted by an expansive last-level cache reaching up to 1.28 gigabytes, or 1,280 megabytes. The processors feature 16 memory channels supporting regular registered dual in-line memory modules at speeds up to 8,000 megatransfers per second and multiplexed registered modules reaching 12,800 megatransfers per second, producing a peak memory bandwidth of 1.6 terabytes per second.
Architecturally, Diamond Rapids combines a central compute tile fabricated on the Intel 18A-P manufacturing process with a separate input-output tile built on the Intel 3 node. The company connects the individual silicon dies using its Foveros Direct three-dimensional packaging technology. The enterprise platform will use the LGA 9324 socket, provide up to 128 PCIe Gen6 lanes, incorporate Compute Express Link 3.0 technology, and operate with a maximum thermal design power of 650 watts.
Cloud deployment and AMD Venice rivalry
At the conference, Intel and Chinese technology conglomerate Tencent announced plans to deploy the Diamond Rapids processors into Tencent Cloud CVM server infrastructure. Tencent currently operates Clearwater Forest-AP chips from Intel's Xeon 6+ family. According to Tencent, adopting the Clearwater Forest-AP silicon allowed the provider to run more than 350 concurrent isolated environments with an average creation latency of roughly 200 milliseconds, boosting deployment efficiency by 1.46 times compared to previous test platforms.
The new Xeon line faces direct competition from rival manufacturer Advanced Micro Devices and its upcoming EPYC Venice server processors. AMD plans to equip Venice with up to 256 Zen 6C cores or 96 standard Zen 6 cores, paired with up to one gigabyte of Level 3 cache and 16 memory channels. Preliminary estimates indicate that Venice will deliver an instructions-per-cycle increase of approximately 27 percent over existing Zen 5 silicon.
AMD plans to launch its Venice processors in 2026, entering the market a year ahead of Intel's 2027 rollout for Diamond Rapids. Intel expects that its most formidable competitive answer to AMD in the enterprise server sector will arrive with the following Xeon generation, codenamed Coral Rapids, which is scheduled for release in 2028.
